1. Field of the Invention
The present invention relates to a mechanism for jitter measurement, and more particularly, to an apparatus and related method for jitter window measurement.
2. Description of the Prior Art
Generally speaking, the mechanisms at present for measuring the amount of jitter of a clock signal can be categorized into an off-chip measurement mechanism and an on-chip measurement mechanism. The well-known off-chip measurement mechanism uses external equipment to measure jitter of a clock signal of a chip in a circuit package via a series of conducting wires, and a drawback thereof is that the measured jitter window differs from the actual jitter window due to conducting wires affected by the effects of resistors, inductors and capacitors. Therefore, on-chip measurement mechanisms are developed in some devices. A jitter measurement circuit is implemented additionally inside a circuit package, and the jitter measurement circuit is arranged to measure the jitter of a clock signal of a chip and then the digitally encoded results are output to external equipment via conducting wires. The advantage is that the on-chip jitter measurement circuit is free of the effects resulting from resistors, inductors and capacitors.
However, the existing on-chip measurement mechanisms use only delay elements to directly impose a phase delay for an original clock signal to detect the jitter of the clock signal. Under this kind of mechanism, the resolution of the measurement result is subject to the unit delay of the delay element itself and cannot be raised efficiently. Therefore, the existing on-chip measurement mechanisms still cannot more accurately detect the jitter window of the clock signal.